In information processing apparatuses including central processing units (CPUs), processing capacity increases in a manner that follows Moore's law. However, the number of pins in a CPU package does not increase so much because of size constraint. Thus, the amount of data communication per pin in an interconnect increases. To cope with this increase in the amount of data communication, efforts are being made to speed up the baud rate.
Related arts are disclosed in Japanese Laid-open Patent Publication Nos. 2001-94424, 2006-270726, and 06-326609.